/*
* vm86 linux syscall support
- *
+ *
* Copyright (c) 2003 Fabrice Bellard
*
* This program is free software; you can redistribute it and/or modify
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#include <stdlib.h>
-#include <stdio.h>
-#include <stdarg.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
+#include "qemu/osdep.h"
#include "qemu.h"
+#include "user-internals.h"
//#define DEBUG_VM86
+#ifdef DEBUG_VM86
+# define LOG_VM86(...) qemu_log(__VA_ARGS__);
+#else
+# define LOG_VM86(...) do { } while (0)
+#endif
+
+
#define set_flags(X,new,mask) \
((X) = ((X) & ~(mask)) | ((new) & (mask)))
return (((uint8_t *)bitmap)[nr >> 3] >> (nr & 7)) & 1;
}
-static inline void vm_putw(uint8_t *segptr, unsigned int reg16, unsigned int val)
+static inline void vm_putw(CPUX86State *env, uint32_t segptr,
+ unsigned int reg16, unsigned int val)
{
- stw(segptr + (reg16 & 0xffff), val);
+ cpu_stw_data(env, segptr + (reg16 & 0xffff), val);
}
-static inline void vm_putl(uint8_t *segptr, unsigned int reg16, unsigned int val)
+static inline void vm_putl(CPUX86State *env, uint32_t segptr,
+ unsigned int reg16, unsigned int val)
{
- stl(segptr + (reg16 & 0xffff), val);
+ cpu_stl_data(env, segptr + (reg16 & 0xffff), val);
}
-static inline unsigned int vm_getw(uint8_t *segptr, unsigned int reg16)
+static inline unsigned int vm_getb(CPUX86State *env,
+ uint32_t segptr, unsigned int reg16)
{
- return lduw(segptr + (reg16 & 0xffff));
+ return cpu_ldub_data(env, segptr + (reg16 & 0xffff));
}
-static inline unsigned int vm_getl(uint8_t *segptr, unsigned int reg16)
+static inline unsigned int vm_getw(CPUX86State *env,
+ uint32_t segptr, unsigned int reg16)
{
- return ldl(segptr + (reg16 & 0xffff));
+ return cpu_lduw_data(env, segptr + (reg16 & 0xffff));
+}
+
+static inline unsigned int vm_getl(CPUX86State *env,
+ uint32_t segptr, unsigned int reg16)
+{
+ return cpu_ldl_data(env, segptr + (reg16 & 0xffff));
}
void save_v86_state(CPUX86State *env)
{
- TaskState *ts = env->opaque;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
+ struct target_vm86plus_struct * target_v86;
+ if (!lock_user_struct(VERIFY_WRITE, target_v86, ts->target_v86, 0))
+ /* FIXME - should return an error */
+ return;
/* put the VM86 registers in the userspace register structure */
- ts->target_v86->regs.eax = tswap32(env->regs[R_EAX]);
- ts->target_v86->regs.ebx = tswap32(env->regs[R_EBX]);
- ts->target_v86->regs.ecx = tswap32(env->regs[R_ECX]);
- ts->target_v86->regs.edx = tswap32(env->regs[R_EDX]);
- ts->target_v86->regs.esi = tswap32(env->regs[R_ESI]);
- ts->target_v86->regs.edi = tswap32(env->regs[R_EDI]);
- ts->target_v86->regs.ebp = tswap32(env->regs[R_EBP]);
- ts->target_v86->regs.esp = tswap32(env->regs[R_ESP]);
- ts->target_v86->regs.eip = tswap32(env->eip);
- ts->target_v86->regs.cs = tswap16(env->segs[R_CS]);
- ts->target_v86->regs.ss = tswap16(env->segs[R_SS]);
- ts->target_v86->regs.ds = tswap16(env->segs[R_DS]);
- ts->target_v86->regs.es = tswap16(env->segs[R_ES]);
- ts->target_v86->regs.fs = tswap16(env->segs[R_FS]);
- ts->target_v86->regs.gs = tswap16(env->segs[R_GS]);
+ target_v86->regs.eax = tswap32(env->regs[R_EAX]);
+ target_v86->regs.ebx = tswap32(env->regs[R_EBX]);
+ target_v86->regs.ecx = tswap32(env->regs[R_ECX]);
+ target_v86->regs.edx = tswap32(env->regs[R_EDX]);
+ target_v86->regs.esi = tswap32(env->regs[R_ESI]);
+ target_v86->regs.edi = tswap32(env->regs[R_EDI]);
+ target_v86->regs.ebp = tswap32(env->regs[R_EBP]);
+ target_v86->regs.esp = tswap32(env->regs[R_ESP]);
+ target_v86->regs.eip = tswap32(env->eip);
+ target_v86->regs.cs = tswap16(env->segs[R_CS].selector);
+ target_v86->regs.ss = tswap16(env->segs[R_SS].selector);
+ target_v86->regs.ds = tswap16(env->segs[R_DS].selector);
+ target_v86->regs.es = tswap16(env->segs[R_ES].selector);
+ target_v86->regs.fs = tswap16(env->segs[R_FS].selector);
+ target_v86->regs.gs = tswap16(env->segs[R_GS].selector);
set_flags(env->eflags, ts->v86flags, VIF_MASK | ts->v86mask);
- ts->target_v86->regs.eflags = tswap32(env->eflags);
-#ifdef DEBUG_VM86
- fprintf(logfile, "save_v86_state: eflags=%08x cs:ip=%04x:%04x\n",
- env->eflags, env->segs[R_CS], env->eip);
-#endif
+ target_v86->regs.eflags = tswap32(env->eflags);
+ unlock_user_struct(target_v86, ts->target_v86, 1);
+ LOG_VM86("save_v86_state: eflags=%08x cs:ip=%04x:%04x\n",
+ env->eflags, env->segs[R_CS].selector, env->eip);
/* restore 32 bit registers */
env->regs[R_EAX] = ts->vm86_saved_regs.eax;
'retval' */
static inline void return_to_32bit(CPUX86State *env, int retval)
{
-#ifdef DEBUG_VM86
- fprintf(logfile, "return_to_32bit: ret=0x%x\n", retval);
-#endif
+ LOG_VM86("return_to_32bit: ret=0x%x\n", retval);
save_v86_state(env);
env->regs[R_EAX] = retval;
}
static inline int set_IF(CPUX86State *env)
{
- TaskState *ts = env->opaque;
-
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
+
ts->v86flags |= VIF_MASK;
if (ts->v86flags & VIP_MASK) {
return_to_32bit(env, TARGET_VM86_STI);
static inline void clear_IF(CPUX86State *env)
{
- TaskState *ts = env->opaque;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
ts->v86flags &= ~VIF_MASK;
}
static inline int set_vflags_long(unsigned long eflags, CPUX86State *env)
{
- TaskState *ts = env->opaque;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
set_flags(ts->v86flags, eflags, ts->v86mask);
set_flags(env->eflags, eflags, SAFE_MASK);
static inline int set_vflags_short(unsigned short flags, CPUX86State *env)
{
- TaskState *ts = env->opaque;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
set_flags(ts->v86flags, flags, ts->v86mask & 0xffff);
set_flags(env->eflags, flags, SAFE_MASK);
static inline unsigned int get_vflags(CPUX86State *env)
{
- TaskState *ts = env->opaque;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
unsigned int flags;
flags = env->eflags & RETURN_MASK;
if (ts->v86flags & VIF_MASK)
flags |= IF_MASK;
+ flags |= IOPL_MASK;
return flags | (ts->v86flags & ts->v86mask);
}
support TSS interrupt revectoring, so this code is always executed) */
static void do_int(CPUX86State *env, int intno)
{
- TaskState *ts = env->opaque;
- uint32_t *int_ptr, segoffs;
- uint8_t *ssp;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
+ uint32_t int_addr, segoffs, ssp;
unsigned int sp;
- if (env->segs[R_CS] == TARGET_BIOSSEG)
+ if (env->segs[R_CS].selector == TARGET_BIOSSEG)
goto cannot_handle;
if (is_revectored(intno, &ts->vm86plus.int_revectored))
goto cannot_handle;
- if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff,
+ if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff,
&ts->vm86plus.int21_revectored))
goto cannot_handle;
- int_ptr = (uint32_t *)(intno << 2);
- segoffs = tswap32(*int_ptr);
+ int_addr = (intno << 2);
+ segoffs = cpu_ldl_data(env, int_addr);
if ((segoffs >> 16) == TARGET_BIOSSEG)
goto cannot_handle;
-#if defined(DEBUG_VM86)
- fprintf(logfile, "VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
- intno, segoffs >> 16, segoffs & 0xffff);
-#endif
+ LOG_VM86("VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
+ intno, segoffs >> 16, segoffs & 0xffff);
/* save old state */
- ssp = (uint8_t *)(env->segs[R_SS] << 4);
+ ssp = env->segs[R_SS].selector << 4;
sp = env->regs[R_ESP] & 0xffff;
- vm_putw(ssp, sp - 2, get_vflags(env));
- vm_putw(ssp, sp - 4, env->segs[R_CS]);
- vm_putw(ssp, sp - 6, env->eip);
+ vm_putw(env, ssp, sp - 2, get_vflags(env));
+ vm_putw(env, ssp, sp - 4, env->segs[R_CS].selector);
+ vm_putw(env, ssp, sp - 6, env->eip);
ADD16(env->regs[R_ESP], -6);
/* goto interrupt handler */
env->eip = segoffs & 0xffff;
clear_AC(env);
return;
cannot_handle:
-#if defined(DEBUG_VM86)
- fprintf(logfile, "VM86: return to 32 bits int 0x%x\n", intno);
-#endif
+ LOG_VM86("VM86: return to 32 bits int 0x%x\n", intno);
return_to_32bit(env, TARGET_VM86_INTx | (intno << 8));
}
#define CHECK_IF_IN_TRAP() \
if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \
(ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \
- newflags |= TF_MASK
+ newflags |= TF_MASK
#define VM86_FAULT_RETURN \
if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \
void handle_vm86_fault(CPUX86State *env)
{
- TaskState *ts = env->opaque;
- uint8_t *csp, *pc, *ssp;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
+ uint32_t csp, ssp;
unsigned int ip, sp, newflags, newip, newcs, opcode, intno;
int data32, pref_done;
- csp = (uint8_t *)(env->segs[R_CS] << 4);
+ csp = env->segs[R_CS].selector << 4;
ip = env->eip & 0xffff;
- pc = csp + ip;
-
- ssp = (uint8_t *)(env->segs[R_SS] << 4);
+
+ ssp = env->segs[R_SS].selector << 4;
sp = env->regs[R_ESP] & 0xffff;
-#if defined(DEBUG_VM86)
- fprintf(logfile, "VM86 exception %04x:%08x %02x %02x\n",
- env->segs[R_CS], env->eip, pc[0], pc[1]);
-#endif
+ LOG_VM86("VM86 exception %04x:%08x\n",
+ env->segs[R_CS].selector, env->eip);
data32 = 0;
pref_done = 0;
do {
- opcode = csp[ip];
+ opcode = vm_getb(env, csp, ip);
ADD16(ip, 1);
switch (opcode) {
case 0x66: /* 32-bit data */ data32=1; break;
switch(opcode) {
case 0x9c: /* pushf */
if (data32) {
- vm_putl(ssp, sp - 4, get_vflags(env));
+ vm_putl(env, ssp, sp - 4, get_vflags(env));
ADD16(env->regs[R_ESP], -4);
} else {
- vm_putw(ssp, sp - 2, get_vflags(env));
+ vm_putw(env, ssp, sp - 2, get_vflags(env));
ADD16(env->regs[R_ESP], -2);
}
env->eip = ip;
case 0x9d: /* popf */
if (data32) {
- newflags = vm_getl(ssp, sp);
+ newflags = vm_getl(env, ssp, sp);
ADD16(env->regs[R_ESP], 4);
} else {
- newflags = vm_getw(ssp, sp);
+ newflags = vm_getw(env, ssp, sp);
ADD16(env->regs[R_ESP], 2);
}
env->eip = ip;
VM86_FAULT_RETURN;
case 0xcd: /* int */
- intno = csp[ip];
+ intno = vm_getb(env, csp, ip);
ADD16(ip, 1);
env->eip = ip;
if (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) {
- if ( (ts->vm86plus.vm86plus.vm86dbg_intxxtab[intno >> 3] >>
+ if ( (ts->vm86plus.vm86plus.vm86dbg_intxxtab[intno >> 3] >>
(intno &7)) & 1) {
return_to_32bit(env, TARGET_VM86_INTx + (intno << 8));
return;
case 0xcf: /* iret */
if (data32) {
- newip = vm_getl(ssp, sp) & 0xffff;
- newcs = vm_getl(ssp, sp + 4) & 0xffff;
- newflags = vm_getl(ssp, sp + 8);
+ newip = vm_getl(env, ssp, sp) & 0xffff;
+ newcs = vm_getl(env, ssp, sp + 4) & 0xffff;
+ newflags = vm_getl(env, ssp, sp + 8);
ADD16(env->regs[R_ESP], 12);
} else {
- newip = vm_getw(ssp, sp);
- newcs = vm_getw(ssp, sp + 2);
- newflags = vm_getw(ssp, sp + 4);
+ newip = vm_getw(env, ssp, sp);
+ newcs = vm_getw(env, ssp, sp + 2);
+ newflags = vm_getw(env, ssp, sp + 4);
ADD16(env->regs[R_ESP], 6);
}
env->eip = newip;
return;
}
VM86_FAULT_RETURN;
-
+
case 0xfa: /* cli */
env->eip = ip;
clear_IF(env);
VM86_FAULT_RETURN;
-
+
case 0xfb: /* sti */
env->eip = ip;
if (set_IF(env))
}
}
-int do_vm86(CPUX86State *env, long subfunction,
- struct target_vm86plus_struct * target_v86)
+int do_vm86(CPUX86State *env, long subfunction, abi_ulong vm86_addr)
{
- TaskState *ts = env->opaque;
+ CPUState *cs = env_cpu(env);
+ TaskState *ts = cs->opaque;
+ struct target_vm86plus_struct * target_v86;
int ret;
-
+
switch (subfunction) {
case TARGET_VM86_REQUEST_IRQ:
case TARGET_VM86_FREE_IRQ:
case TARGET_VM86_GET_IRQ_BITS:
case TARGET_VM86_GET_AND_RESET_IRQ:
- gemu_log("qemu: unsupported vm86 subfunction (%ld)\n", subfunction);
- ret = -EINVAL;
+ qemu_log_mask(LOG_UNIMP, "qemu: unsupported vm86 subfunction (%ld)\n",
+ subfunction);
+ ret = -TARGET_EINVAL;
goto out;
case TARGET_VM86_PLUS_INSTALL_CHECK:
/* NOTE: on old vm86 stuff this will return the error
goto out;
}
- ts->target_v86 = target_v86;
/* save current CPU regs */
ts->vm86_saved_regs.eax = 0; /* default vm86 syscall return code */
ts->vm86_saved_regs.ebx = env->regs[R_EBX];
ts->vm86_saved_regs.esp = env->regs[R_ESP];
ts->vm86_saved_regs.eflags = env->eflags;
ts->vm86_saved_regs.eip = env->eip;
- ts->vm86_saved_regs.cs = env->segs[R_CS];
- ts->vm86_saved_regs.ss = env->segs[R_SS];
- ts->vm86_saved_regs.ds = env->segs[R_DS];
- ts->vm86_saved_regs.es = env->segs[R_ES];
- ts->vm86_saved_regs.fs = env->segs[R_FS];
- ts->vm86_saved_regs.gs = env->segs[R_GS];
-
+ ts->vm86_saved_regs.cs = env->segs[R_CS].selector;
+ ts->vm86_saved_regs.ss = env->segs[R_SS].selector;
+ ts->vm86_saved_regs.ds = env->segs[R_DS].selector;
+ ts->vm86_saved_regs.es = env->segs[R_ES].selector;
+ ts->vm86_saved_regs.fs = env->segs[R_FS].selector;
+ ts->vm86_saved_regs.gs = env->segs[R_GS].selector;
+
+ ts->target_v86 = vm86_addr;
+ if (!lock_user_struct(VERIFY_READ, target_v86, vm86_addr, 1))
+ return -TARGET_EFAULT;
/* build vm86 CPU state */
ts->v86flags = tswap32(target_v86->regs.eflags);
- env->eflags = (env->eflags & ~SAFE_MASK) |
+ env->eflags = (env->eflags & ~SAFE_MASK) |
(tswap32(target_v86->regs.eflags) & SAFE_MASK) | VM_MASK;
- ts->vm86plus.cpu_type = tswapl(target_v86->cpu_type);
+ ts->vm86plus.cpu_type = tswapal(target_v86->cpu_type);
switch (ts->vm86plus.cpu_type) {
case TARGET_CPU_286:
ts->v86mask = 0;
cpu_x86_load_seg(env, R_GS, tswap16(target_v86->regs.gs));
ret = tswap32(target_v86->regs.eax); /* eax will be restored at
the end of the syscall */
- memcpy(&ts->vm86plus.int_revectored,
+ memcpy(&ts->vm86plus.int_revectored,
&target_v86->int_revectored, 32);
- memcpy(&ts->vm86plus.int21_revectored,
+ memcpy(&ts->vm86plus.int21_revectored,
&target_v86->int21_revectored, 32);
- ts->vm86plus.vm86plus.flags = tswapl(target_v86->vm86plus.flags);
- memcpy(&ts->vm86plus.vm86plus.vm86dbg_intxxtab,
+ ts->vm86plus.vm86plus.flags = tswapal(target_v86->vm86plus.flags);
+ memcpy(&ts->vm86plus.vm86plus.vm86dbg_intxxtab,
target_v86->vm86plus.vm86dbg_intxxtab, 32);
-
-#ifdef DEBUG_VM86
- fprintf(logfile, "do_vm86: cs:ip=%04x:%04x\n", env->segs[R_CS], env->eip);
-#endif
+ unlock_user_struct(target_v86, vm86_addr, 0);
+
+ LOG_VM86("do_vm86: cs:ip=%04x:%04x\n",
+ env->segs[R_CS].selector, env->eip);
/* now the virtual CPU is ready for vm86 execution ! */
out:
return ret;
}
-