target/arm: Complete TBI clearing for user-only for SVE

[mirror_qemu.git] / target / arm / cpu.c

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index d9876337c0537446f3d9eba8f45b91a8a5280fa1..afe81e9b6c047696a6841519a5db572e6d0ee144 100644 (file)
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -203,6 +203,9 @@ static void arm_cpu_reset(DeviceState *dev)
          * Enable TBI0 and TBI1.  While the real kernel only enables TBI0,
          * turning on both here will produce smaller code and otherwise
          * make no difference to the user-level emulation.
+         *
+         * In sve_probe_page, we assume that this is set.
+         * Do not modify this without other changes.
          */
         env->cp15.tcr_el[1].raw_tcr = (3ULL << 37);
 #else