.feat_names = {
NULL, NULL, NULL, NULL,
"avx-vnni-int8", "avx-ne-convert", NULL, NULL,
- NULL, NULL, NULL, NULL,
+ "amx-complex", NULL, NULL, NULL,
NULL, NULL, "prefetchiti", NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, "sbdr-ssdp-no", "fbsdp-no", "psdp-no",
NULL, "fb-clear", NULL, NULL,
NULL, NULL, NULL, NULL,
- "pbrsb-no", NULL, NULL, NULL,
+ "pbrsb-no", NULL, "gds-no", NULL,
NULL, NULL, NULL, NULL,
},
.msr = {
.feat_names = {
[54] = "vmx-ins-outs",
[55] = "vmx-true-ctls",
+ [56] = "vmx-any-errcode",
},
.msr = {
.index = MSR_IA32_VMX_BASIC,
return name;
}
-/* Compatibily hack to maintain legacy +-feat semantic,
+/* Compatibility hack to maintain legacy +-feat semantic,
* where +-feat overwrites any feature set by
* feat=on|feat even if the later is parsed after +-feat
* (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
case 7:
/* Structured Extended Feature Flags Enumeration Leaf */
if (count == 0) {
+ uint32_t eax_0_unused, ebx_0, ecx_0, edx_0_unused;
+
/* Maximum ECX value for sub-leaves */
*eax = env->cpuid_level_func7;
*ebx = env->features[FEAT_7_0_EBX]; /* Feature flags */
* support enabling SGX and/or SGX flexible launch control,
* then we need to update the VM's CPUID values accordingly.
*/
- if ((*ebx & CPUID_7_0_EBX_SGX) &&
- (!kvm_enabled() ||
- !(kvm_arch_get_supported_cpuid(cs->kvm_state, 0x7, 0, R_EBX) &
- CPUID_7_0_EBX_SGX))) {
+ x86_cpu_get_supported_cpuid(0x7, 0,
+ &eax_0_unused, &ebx_0,
+ &ecx_0, &edx_0_unused);
+ if ((*ebx & CPUID_7_0_EBX_SGX) && !(ebx_0 & CPUID_7_0_EBX_SGX)) {
*ebx &= ~CPUID_7_0_EBX_SGX;
}
- if ((*ecx & CPUID_7_0_ECX_SGX_LC) &&
- (!(*ebx & CPUID_7_0_EBX_SGX) || !kvm_enabled() ||
- !(kvm_arch_get_supported_cpuid(cs->kvm_state, 0x7, 0, R_ECX) &
- CPUID_7_0_ECX_SGX_LC))) {
+ if ((*ecx & CPUID_7_0_ECX_SGX_LC)
+ && (!(*ebx & CPUID_7_0_EBX_SGX) || !(ecx_0 & CPUID_7_0_ECX_SGX_LC))) {
*ecx &= ~CPUID_7_0_ECX_SGX_LC;
}
} else if (count == 1) {
break;
case 0xA:
/* Architectural Performance Monitoring Leaf */
- if (accel_uses_host_cpuid() && cpu->enable_pmu) {
+ if (cpu->enable_pmu) {
x86_cpu_get_supported_cpuid(0xA, count, eax, ebx, ecx, edx);
} else {
*eax = 0;
*ebx &= 0xffff; /* The count doesn't need to be reliable. */
break;
case 0x1C:
- if (accel_uses_host_cpuid() && cpu->enable_pmu &&
- (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
+ if (cpu->enable_pmu && (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
x86_cpu_get_supported_cpuid(0x1C, 0, eax, ebx, ecx, edx);
*edx = 0;
}
* The initial value of xcr0 and ebx == 0, On host without kvm
* commit 412a3c41(e.g., CentOS 6), the ebx's value always == 0
* even through guest update xcr0, this will crash some legacy guest
- * (e.g., CentOS 6), So set ebx == ecx to workaroud it.
+ * (e.g., CentOS 6), So set ebx == ecx to workaround it.
*/
*ebx = kvm_enabled() ? *ecx : xsave_area_size(env->xcr0, false);
} else if (count == 1) {
} else {
*ecx &= ~XSTATE_ARCH_LBR_MASK;
}
- } else if (count == 0xf &&
- accel_uses_host_cpuid() && cpu->enable_pmu &&
- (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
+ } else if (count == 0xf && cpu->enable_pmu
+ && (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
x86_cpu_get_supported_cpuid(0xD, count, eax, ebx, ecx, edx);
} else if (count < ARRAY_SIZE(x86_ext_save_areas)) {
const ExtSaveArea *esa = &x86_ext_save_areas[count];
env->cpuid_xlevel2 = env->cpuid_min_xlevel2;
}
- if (kvm_enabled()) {
- kvm_hyperv_expand_features(cpu, errp);
+ if (kvm_enabled() && !kvm_hyperv_expand_features(cpu, errp)) {
+ return;
}
}
mark_unavailable_features(cpu, w, unavailable_features, prefix);
}
- if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) &&
- kvm_enabled()) {
- KVMState *s = CPU(cpu)->kvm_state;
- uint32_t eax_0 = kvm_arch_get_supported_cpuid(s, 0x14, 0, R_EAX);
- uint32_t ebx_0 = kvm_arch_get_supported_cpuid(s, 0x14, 0, R_EBX);
- uint32_t ecx_0 = kvm_arch_get_supported_cpuid(s, 0x14, 0, R_ECX);
- uint32_t eax_1 = kvm_arch_get_supported_cpuid(s, 0x14, 1, R_EAX);
- uint32_t ebx_1 = kvm_arch_get_supported_cpuid(s, 0x14, 1, R_EBX);
+ if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) {
+ uint32_t eax_0, ebx_0, ecx_0, edx_0_unused;
+ uint32_t eax_1, ebx_1, ecx_1_unused, edx_1_unused;
+
+ x86_cpu_get_supported_cpuid(0x14, 0,
+ &eax_0, &ebx_0, &ecx_0, &edx_0_unused);
+ x86_cpu_get_supported_cpuid(0x14, 1,
+ &eax_1, &ebx_1, &ecx_1_unused, &edx_1_unused);
if (!eax_0 ||
((ebx_0 & INTEL_PT_MINIMAL_EBX) != INTEL_PT_MINIMAL_EBX) ||