i386: Add new property to control cache info

[mirror_qemu.git] / target / i386 / cpu.h

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ac94013c4a6eed24f3e16d15dcd4c5a643428f1a..8bc54d70bf909892d2bc5a7ed9299d421bd55db5 100644 (file)
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1399,6 +1399,11 @@ struct X86CPU {
      */
     bool enable_l3_cache;
 
+    /* Compatibility bits for old machine types.
+     * If true present the old cache topology information
+     */
+    bool legacy_cache;
+
     /* Compatibility bits for old machine types: */
     bool enable_cpuid_0xb;