target/openrisc: Add VR2 and AVR special processor registers

[mirror_qemu.git] / target / openrisc / sys_helper.c

diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index a2b1f52294480104d2b7f17ad3aebbae08484ff7..cf8e637b08763fd61c0ad6d027feaf02933c3f22 100644 (file)
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -210,6 +210,12 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
     case TO_SPR(0, 4): /* IMMUCFGR */
         return env->immucfgr;
 
+    case TO_SPR(0, 9): /* VR2 */
+        return env->vr2;
+
+    case TO_SPR(0, 10): /* AVR */
+        return env->avr;
+
     case TO_SPR(0, 11): /* EVBAR */
         return env->evbar;