/* share data between vector helpers and decode code */
FIELD(VDATA, VM, 0, 1)
FIELD(VDATA, LMUL, 1, 3)
-FIELD(VDATA, NF, 4, 4)
-FIELD(VDATA, WD, 4, 1)
+FIELD(VDATA, VTA, 4, 1)
+FIELD(VDATA, VTA_ALL_1S, 5, 1)
+FIELD(VDATA, VMA, 6, 1)
+FIELD(VDATA, NF, 7, 4)
+FIELD(VDATA, WD, 7, 1)
/* float point classify helpers */
target_ulong fclass_h(uint64_t frs1);
RISCV_FRM_ROD = 8, /* Round to Odd */
};
-static inline uint64_t nanbox_s(float32 f)
+static inline uint64_t nanbox_s(CPURISCVState *env, float32 f)
{
- return f | MAKE_64BIT_MASK(32, 32);
+ /* the value is sign-extended instead of NaN-boxing for zfinx */
+ if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ return (int32_t)f;
+ } else {
+ return f | MAKE_64BIT_MASK(32, 32);
+ }
}
-static inline float32 check_nanbox_s(uint64_t f)
+static inline float32 check_nanbox_s(CPURISCVState *env, uint64_t f)
{
+ /* Disable NaN-boxing check when enable zfinx */
+ if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ return (uint32_t)f;
+ }
+
uint64_t mask = MAKE_64BIT_MASK(32, 32);
if (likely((f & mask) == mask)) {
}
}
-static inline uint64_t nanbox_h(float16 f)
+static inline uint64_t nanbox_h(CPURISCVState *env, float16 f)
{
- return f | MAKE_64BIT_MASK(16, 48);
+ /* the value is sign-extended instead of NaN-boxing for zfinx */
+ if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ return (int16_t)f;
+ } else {
+ return f | MAKE_64BIT_MASK(16, 48);
+ }
}
-static inline float16 check_nanbox_h(uint64_t f)
+static inline float16 check_nanbox_h(CPURISCVState *env, uint64_t f)
{
+ /* Disable nanbox check when enable zfinx */
+ if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ return (uint16_t)f;
+ }
+
uint64_t mask = MAKE_64BIT_MASK(16, 48);
if (likely((f & mask) == mask)) {