#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/qemu-print.h"
#include "cpu.h"
-#include "qemu-common.h"
#include "migration/vmstate.h"
#include "exec/exec-all.h"
-
+#include "fpu/softfloat-helpers.h"
static void superh_cpu_set_pc(CPUState *cs, vaddr value)
{
set_flush_to_zero(1, &env->fp_status);
#endif
set_default_nan_mode(1, &env->fp_status);
- set_snan_bit_is_one(1, &env->fp_status);
}
static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
info->print_insn = print_insn_sh;
}
-typedef struct SuperHCPUListState {
- fprintf_function cpu_fprintf;
- FILE *file;
-} SuperHCPUListState;
-
-/* Sort alphabetically by type name. */
-static gint superh_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- ObjectClass *class_a = (ObjectClass *)a;
- ObjectClass *class_b = (ObjectClass *)b;
- const char *name_a, *name_b;
-
- name_a = object_class_get_name(class_a);
- name_b = object_class_get_name(class_b);
- return strcmp(name_a, name_b);
-}
-
static void superh_cpu_list_entry(gpointer data, gpointer user_data)
{
- ObjectClass *oc = data;
- SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- SuperHCPUListState *s = user_data;
+ const char *typename = object_class_get_name(OBJECT_CLASS(data));
+ int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
- (*s->cpu_fprintf)(s->file, "%s\n",
- scc->name);
+ qemu_printf("%.*s\n", len, typename);
}
-void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
+void sh4_cpu_list(void)
{
- SuperHCPUListState s = {
- .cpu_fprintf = cpu_fprintf,
- .file = f,
- };
GSList *list;
- list = object_class_get_list(TYPE_SUPERH_CPU, false);
- list = g_slist_sort(list, superh_cpu_list_compare);
- g_slist_foreach(list, superh_cpu_list_entry, &s);
+ list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false);
+ g_slist_foreach(list, superh_cpu_list_entry, NULL);
g_slist_free(list);
}
-static gint superh_cpu_name_compare(gconstpointer a, gconstpointer b)
-{
- const SuperHCPUClass *scc = SUPERH_CPU_CLASS(a);
- const char *name = b;
-
- return strcasecmp(scc->name, name);
-}
-
static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
- GSList *list, *item;
+ char *s, *typename = NULL;
- if (cpu_model == NULL) {
- return NULL;
- }
- if (strcasecmp(cpu_model, "any") == 0) {
- return object_class_by_name(TYPE_SH7750R_CPU);
+ s = g_ascii_strdown(cpu_model, -1);
+ if (strcmp(s, "any") == 0) {
+ oc = object_class_by_name(TYPE_SH7750R_CPU);
+ goto out;
}
- oc = object_class_by_name(cpu_model);
- if (oc != NULL && object_class_dynamic_cast(oc, TYPE_SUPERH_CPU) != NULL
- && !object_class_is_abstract(oc)) {
- return oc;
+ typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s);
+ oc = object_class_by_name(typename);
+ if (oc != NULL && object_class_is_abstract(oc)) {
+ oc = NULL;
}
- oc = NULL;
- list = object_class_get_list(TYPE_SUPERH_CPU, false);
- item = g_slist_find_custom(list, cpu_model, superh_cpu_name_compare);
- if (item != NULL) {
- oc = item->data;
- }
- g_slist_free(list);
+out:
+ g_free(s);
+ g_free(typename);
return oc;
}
-SuperHCPU *cpu_sh4_init(const char *cpu_model)
-{
- return SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
-}
-
static void sh7750r_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
{
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- scc->name = "SH7750R";
scc->pvr = 0x00050000;
scc->prr = 0x00000100;
scc->cvr = 0x00110000;
}
-static const TypeInfo sh7750r_type_info = {
- .name = TYPE_SH7750R_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7750r_class_init,
- .instance_init = sh7750r_cpu_initfn,
-};
-
static void sh7751r_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
{
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- scc->name = "SH7751R";
scc->pvr = 0x04050005;
scc->prr = 0x00000113;
scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
}
-static const TypeInfo sh7751r_type_info = {
- .name = TYPE_SH7751R_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7751r_class_init,
- .instance_init = sh7751r_cpu_initfn,
-};
-
static void sh7785_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
{
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- scc->name = "SH7785";
scc->pvr = 0x10300700;
scc->prr = 0x00000200;
scc->cvr = 0x71440211;
}
-static const TypeInfo sh7785_type_info = {
- .name = TYPE_SH7785_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7785_class_init,
- .instance_init = sh7785_cpu_initfn,
-};
-
static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
static void superh_cpu_initfn(Object *obj)
{
- CPUState *cs = CPU(obj);
SuperHCPU *cpu = SUPERH_CPU(obj);
CPUSH4State *env = &cpu->env;
- cs->env_ptr = env;
+ cpu_set_cpustate_pointers(cpu);
env->movcal_backup_tail = &(env->movcal_backup);
-
- if (tcg_enabled()) {
- sh4_translate_init();
- }
}
static const VMStateDescription vmstate_sh_cpu = {
CPUClass *cc = CPU_CLASS(oc);
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- scc->parent_realize = dc->realize;
- dc->realize = superh_cpu_realizefn;
+ device_class_set_parent_realize(dc, superh_cpu_realizefn,
+ &scc->parent_realize);
scc->parent_reset = cc->reset;
cc->reset = superh_cpu_reset;
cc->synchronize_from_tb = superh_cpu_synchronize_from_tb;
cc->gdb_read_register = superh_cpu_gdb_read_register;
cc->gdb_write_register = superh_cpu_gdb_write_register;
-#ifdef CONFIG_USER_ONLY
- cc->handle_mmu_fault = superh_cpu_handle_mmu_fault;
-#else
+ cc->tlb_fill = superh_cpu_tlb_fill;
+#ifndef CONFIG_USER_ONLY
cc->do_unaligned_access = superh_cpu_do_unaligned_access;
cc->get_phys_page_debug = superh_cpu_get_phys_page_debug;
#endif
cc->disas_set_info = superh_cpu_disas_set_info;
+ cc->tcg_initialize = sh4_translate_init;
cc->gdb_num_core_regs = 59;
dc->vmsd = &vmstate_sh_cpu;
}
-static const TypeInfo superh_cpu_type_info = {
- .name = TYPE_SUPERH_CPU,
- .parent = TYPE_CPU,
- .instance_size = sizeof(SuperHCPU),
- .instance_init = superh_cpu_initfn,
- .abstract = true,
- .class_size = sizeof(SuperHCPUClass),
- .class_init = superh_cpu_class_init,
-};
+#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \
+ { \
+ .name = type_name, \
+ .parent = TYPE_SUPERH_CPU, \
+ .class_init = cinit, \
+ .instance_init = initfn, \
+ }
+static const TypeInfo superh_cpu_type_infos[] = {
+ {
+ .name = TYPE_SUPERH_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(SuperHCPU),
+ .instance_init = superh_cpu_initfn,
+ .abstract = true,
+ .class_size = sizeof(SuperHCPUClass),
+ .class_init = superh_cpu_class_init,
+ },
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init,
+ sh7750r_cpu_initfn),
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init,
+ sh7751r_cpu_initfn),
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init,
+ sh7785_cpu_initfn),
-static void superh_cpu_register_types(void)
-{
- type_register_static(&superh_cpu_type_info);
- type_register_static(&sh7750r_type_info);
- type_register_static(&sh7751r_type_info);
- type_register_static(&sh7785_type_info);
-}
+};
-type_init(superh_cpu_register_types)
+DEFINE_TYPES(superh_cpu_type_infos)
projects / mirror_qemu.git / blobdiff