}
static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca,
- unsigned srcb, TCGMemOp memop, const char *name)
+ unsigned srcb, MemOp memop, const char *name)
{
if (dest) {
return TILEGX_EXCP_OPCODE_UNKNOWN;
}
static TileExcp gen_st_add_opcode(DisasContext *dc, unsigned srca, unsigned srcb,
- int imm, TCGMemOp memop, const char *name)
+ int imm, MemOp memop, const char *name)
{
TCGv tsrca = load_gr(dc, srca);
TCGv tsrcb = load_gr(dc, srcb);
{
TCGv tdest, tsrca;
const char *mnemonic;
- TCGMemOp memop;
+ MemOp memop;
TileExcp ret = TILEGX_EXCP_NONE;
bool prefetch_nofault = false;
TCGv tsrca = load_gr(dc, srca);
bool prefetch_nofault = false;
const char *mnemonic;
- TCGMemOp memop;
+ MemOp memop;
int i2, i3;
TCGv t0;
unsigned srca = get_SrcA_Y2(bundle);
unsigned srcbdest = get_SrcBDest_Y2(bundle);
const char *mnemonic;
- TCGMemOp memop;
+ MemOp memop;
bool prefetch_nofault = false;
switch (OEY2(opc, mode)) {
}
}
-void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb)
+void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
{
CPUTLGState *env = cs->env_ptr;
DisasContext ctx;
uint64_t pc_start = tb->pc;
uint64_t page_start = pc_start & TARGET_PAGE_MASK;
int num_insns = 0;
- int max_insns = tb_cflags(tb) & CF_COUNT_MASK;
dc->pc = pc_start;
dc->mmuidx = 0;
dc->zero = NULL;
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
- qemu_log_lock();
qemu_log("IN: %s\n", lookup_symbol(pc_start));
}
- if (!max_insns) {
- max_insns = CF_COUNT_MASK;
- }
- if (cs->singlestep_enabled || singlestep) {
- max_insns = 1;
- }
- if (max_insns > TCG_MAX_INSNS) {
- max_insns = TCG_MAX_INSNS;
- }
gen_tb_start(tb);
while (1) {
gen_tb_end(tb, num_insns);
tb->size = dc->pc - pc_start;
tb->icount = num_insns;
-
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
- qemu_log("\n");
- qemu_log_unlock();
- }
}
void restore_state_to_opc(CPUTLGState *env, TranslationBlock *tb,