target/xtensa: add DFPU registers and opcodes

[mirror_qemu.git] / target / xtensa / overlay_tool.h

diff --git a/target/xtensa/overlay_tool.h b/target/xtensa/overlay_tool.h
index 9f0846c86b65790d83be3794a77caecbac04c538..78720734fe92c3fd7d14502d3614567edd6f5177 100644 (file)
--- a/target/xtensa/overlay_tool.h
+++ b/target/xtensa/overlay_tool.h
@@ -538,6 +538,7 @@
     .ndepc = (XCHAL_XEA_VERSION >= 2), \
     .inst_fetch_width = XCHAL_INST_FETCH_WIDTH, \
     .max_insn_size = XCHAL_MAX_INSTRUCTION_SIZE, \
+    .use_first_nan = !XCHAL_HAVE_DFPU, \
     EXCEPTIONS_SECTION, \
     INTERRUPTS_SECTION, \
     TLB_SECTION, \