target-i386: Enable control registers for MPX

[mirror_qemu.git] / target-i386 / translate.c

diff --git a/target-i386/translate.c b/target-i386/translate.c
index ce2ffc1bcac5e861ce6c585c93c7ea5d89546d57..dc87e5861d6d82fc5b1c8669f05421698809395c 100644 (file)
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7633,6 +7633,11 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
             tcg_gen_concat_tl_i64(cpu_tmp1_i64, cpu_regs[R_EAX],
                                   cpu_regs[R_EDX]);
             gen_helper_xrstor(cpu_env, cpu_A0, cpu_tmp1_i64);
+            /* XRSTOR is how MPX is enabled, which changes how
+               we translate.  Thus we need to end the TB.  */
+            gen_update_cc_op(s);
+            gen_jmp_im(s->pc - s->cs_base);
+            gen_eob(s);
             break;
 
         CASE_MEM_OP(6): /* xsaveopt / clwb */