target-mips: support CP0.Config4.AE bit

[mirror_qemu.git] / target-mips / cpu.h

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 3e233ad639cde4f79eb70c51113ea4878406282a..2c4583931ca95b9021cc3bc19fc217c2d58f9c8d 100644 (file)
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -468,6 +468,7 @@ struct CPUMIPSState {
     int32_t CP0_Config4_rw_bitmask;
 #define CP0C4_M    31
 #define CP0C4_IE   29
+#define CP0C4_AE   28
 #define CP0C4_KScrExist 16
 #define CP0C4_MMUExtDef 14
 #define CP0C4_FTLBPageSize 8