target-tricore: Add instructions of SR opcode format

[mirror_qemu.git] / target-sparc / machine.c

diff --git a/target-sparc/machine.c b/target-sparc/machine.c
index 235b088a45a6ae7b70b5c04ae0267c8b0caaacbe..3f3de4c65a996cb8a587d4d22c2d810f6d4d4110 100644 (file)
--- a/target-sparc/machine.c
+++ b/target-sparc/machine.c
@@ -1,12 +1,12 @@
 #include "hw/hw.h"
 #include "hw/boards.h"
-#include "qemu-timer.h"
+#include "qemu/timer.h"
 
 #include "cpu.h"
 
 void cpu_save(QEMUFile *f, void *opaque)
 {
-    CPUState *env = opaque;
+    CPUSPARCState *env = opaque;
     int i;
     uint32_t tmp;
 
@@ -111,7 +111,8 @@ void cpu_save(QEMUFile *f, void *opaque)
 
 int cpu_load(QEMUFile *f, void *opaque, int version_id)
 {
-    CPUState *env = opaque;
+    CPUSPARCState *env = opaque;
+    SPARCCPU *cpu = sparc_env_get_cpu(env);
     int i;
     uint32_t tmp;
 
@@ -212,6 +213,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
     qemu_get_be64s(f, &env->ssr);
     cpu_get_timer(f, env->hstick);
 #endif
-    tlb_flush(env, 1);
+    tlb_flush(CPU(cpu), 1);
     return 0;
 }