UBUNTU: SAUCE: perf vendor events powerpc: Update POWER9 events

[mirror_ubuntu-artful-kernel.git] / tools / perf / pmu-events / arch / powerpc / power9 / floating-point.json

diff --git a/tools/perf/pmu-events/arch/powerpc/power9/floating-point.json b/tools/perf/pmu-events/arch/powerpc/power9/floating-point.json
index d4e4669c1cf34d8cbfdd459333d5f438d2b5fe3d..8a83bca26552a149defe6e06f52756e055d69250 100644 (file)
--- a/tools/perf/pmu-events/arch/powerpc/power9/floating-point.json
+++ b/tools/perf/pmu-events/arch/powerpc/power9/floating-point.json
@@ -1,44 +1,32 @@
 [
-  {,
-    "EventCode": "0x10058",
-    "EventName": "PM_MEM_LOC_THRESH_IFU",
-    "BriefDescription": "Local Memory above threshold for IFU speculation control",
-    "PublicDescription": ""
-  },
-  {,
-    "EventCode": "0x4505E",
-    "EventName": "PM_FLOP_CMPL",
-    "BriefDescription": "Floating Point Operation Finished",
-    "PublicDescription": ""
-  },
   {,
     "EventCode": "0x1415A",
     "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC",
-    "BriefDescription": "Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load",
-    "PublicDescription": ""
+    "BriefDescription": "Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load"
   },
   {,
-    "EventCode": "0x2D028",
-    "EventName": "PM_RADIX_PWC_L2_PDE_FROM_L2",
-    "BriefDescription": "A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L2 data cache",
-    "PublicDescription": ""
+    "EventCode": "0x10058",
+    "EventName": "PM_MEM_LOC_THRESH_IFU",
+    "BriefDescription": "Local Memory above threshold for IFU speculation control"
   },
   {,
-    "EventCode": "0x2D154",
-    "EventName": "PM_MRK_DERAT_MISS_64K",
-    "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 64K",
-    "PublicDescription": ""
+    "EventCode": "0x2D028",
+    "EventName": "PM_RADIX_PWC_L2_PDE_FROM_L2",
+    "BriefDescription": "A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L2 data cache"
   },
   {,
     "EventCode": "0x30012",
     "EventName": "PM_FLUSH_COMPLETION",
-    "BriefDescription": "The instruction that was next to complete did not complete because it suffered a flush",
-    "PublicDescription": ""
+    "BriefDescription": "The instruction that was next to complete did not complete because it suffered a flush"
+  },
+  {,
+    "EventCode": "0x2D154",
+    "EventName": "PM_MRK_DERAT_MISS_64K",
+    "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 64K"
   },
   {,
     "EventCode": "0x4016E",
     "EventName": "PM_THRESH_NOT_MET",
-    "BriefDescription": "Threshold counter did not meet threshold",
-    "PublicDescription": ""
+    "BriefDescription": "Threshold counter did not meet threshold"
   }
-]
+]
\ No newline at end of file