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ARM: dts: DRA7: change address-cells and size-cells
authorLokesh Vutla <lokeshvutla@ti.com>
Wed, 24 Feb 2016 10:11:04 +0000 (15:41 +0530)
committerTony Lindgren <tony@atomide.com>
Mon, 29 Feb 2016 23:02:15 +0000 (15:02 -0800)
commitdae320ec31736865d22bfac78717726b6545ff41
tree727c00770423f7513af069014f376aa65eb89c0atree
parent4d91e285483bf6a93d84a483ec0921b86bbc3d24commit | diff
ARM: dts: DRA7: change address-cells and size-cells

DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am57xx-beagle-x15.dts diff | blob | blame | history
arch/arm/boot/dts/am57xx-cl-som-am57x.dts diff | blob | blame | history
arch/arm/boot/dts/dra7-evm.dts diff | blob | blame | history
arch/arm/boot/dts/dra7.dtsi diff | blob | blame | history
arch/arm/boot/dts/dra72-evm.dts diff | blob | blame | history
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