]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/commit - arch/x86/kvm/x86.c
kvm/x86: Export MDS_NO=0 to guests when TSX is enabled
authorPawan Gupta <pawan.kumar.gupta@linux.intel.com>
Wed, 23 Oct 2019 10:23:33 +0000 (12:23 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Mon, 28 Oct 2019 07:36:59 +0000 (08:36 +0100)
commite1d38b63acd843cfdd4222bf19a26700fd5c699e
tree628b58426dbd6b25dc4200409ac19a3e079ba4e8
parent6608b45ac5ecb56f9e171252229c39580cc85f0f
kvm/x86: Export MDS_NO=0 to guests when TSX is enabled

Export the IA32_ARCH_CAPABILITIES MSR bit MDS_NO=0 to guests on TSX
Async Abort(TAA) affected hosts that have TSX enabled and updated
microcode. This is required so that the guests don't complain,

  "Vulnerable: Clear CPU buffers attempted, no microcode"

when the host has the updated microcode to clear CPU buffers.

Microcode update also adds support for MSR_IA32_TSX_CTRL which is
enumerated by the ARCH_CAP_TSX_CTRL bit in IA32_ARCH_CAPABILITIES MSR.
Guests can't do this check themselves when the ARCH_CAP_TSX_CTRL bit is
not exported to the guests.

In this case export MDS_NO=0 to the guests. When guests have
CPUID.MD_CLEAR=1, they deploy MDS mitigation which also mitigates TAA.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Neelima Krishnan <neelima.krishnan@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
arch/x86/kvm/x86.c