]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/commit - drivers/clk/renesas/r9a07g044-cpg.c
dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions
authorBiju Das <biju.das.jz@bp.renesas.com>
Sat, 26 Jun 2021 08:13:39 +0000 (09:13 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 12 Jul 2021 08:52:03 +0000 (10:52 +0200)
commitc3e67ad6f5a2c698a055fb297c6f9962f5145edd
treed74b319d468e8b5fb60779e6fbb50135c2a3265f
parent668756f7299d2d3c75add17cb415717e247450ef
dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions

Update clock and reset definitions as per RZ/G2L_clock_list_r02_02.xlsx
and RZ/G2L HW(Rev.0.50) manual.

Update {GIC,IA55,SCIF} clock and reset entries in the CPG driver, and
separate reset from module clocks in order to handle them efficiently.

Update the SCIF0 clock and reset index in the SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210626081344.5783-6-biju.das.jz@bp.renesas.com
Link: https://lore.kernel.org/r/20210626081344.5783-7-biju.das.jz@bp.renesas.com
Link: https://lore.kernel.org/r/20210626081344.5783-8-biju.das.jz@bp.renesas.com
[geert: Squashed 3 commits]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
drivers/clk/renesas/r9a07g044-cpg.c
drivers/clk/renesas/renesas-rzg2l-cpg.c
drivers/clk/renesas/renesas-rzg2l-cpg.h
include/dt-bindings/clock/r9a07g044-cpg.h