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author	Sean Wang <sean.wang@mediatek.com>
	Thu, 22 Sep 2016 02:33:55 +0000 (10:33 +0800)
committer	David S. Miller <davem@davemloft.net>
	Thu, 22 Sep 2016 12:21:21 +0000 (08:21 -0400)
commit	f430dea7c150dab2c103d28fa32efb59b5ae80b4
tree	0c936f92d17ba70706a82cd18b0901e407a62486	tree
parent	572de608e36279f249c9a6350f142e69f23dacab	commit \| diff

net: ethernet: mediatek: add support for GMAC0 connecting with external PHY through TRGMII

Changing dynamically source clock, TX/RX delay and interface mode
used by TRGMII hardware module inside PHY capability polling routine
for adapting to the various speed of RGMII used by external PHY for
GMAC0.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

drivers/net/ethernet/mediatek/mtk_eth_soc.c		diff \| blob \| blame \| history
drivers/net/ethernet/mediatek/mtk_eth_soc.h		diff \| blob \| blame \| history

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