]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/commit - drivers/tty/serial/amba-pl011.c
tty: amba-pl011: define flag register bits for ZTE device
authorShawn Guo <shawn.guo@linaro.org>
Fri, 8 Jul 2016 09:00:39 +0000 (17:00 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 31 Aug 2016 13:24:23 +0000 (15:24 +0200)
commit0e125a5facf857567f8bb6dbb1ceefac14b2fa64
treecbcbae8813c7018412c576978248113360f93148
parent694d0d0bb2030d2e36df73e2d23d5770511dbc8d
tty: amba-pl011: define flag register bits for ZTE device

For some reason we do not really understand, ZTE hardware designers
choose to define PL011 Flag Register bit positions differently from
standard ones as below.

Bit Standard ZTE
-----------------------------------
CTS 0 1
DSR 1 3
BUSY 3 8
RI 8 0

Let's define these bits into vendor data and get ZTE PL011 supported
properly.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/amba-pl011.c
include/linux/amba/serial.h