]> git.proxmox.com Git - mirror_qemu.git/commit - hw/arm/aspeed.c
hw/sd/aspeed_sdhci: New device
authorEddie James <eajames@linux.ibm.com>
Wed, 25 Sep 2019 14:32:27 +0000 (16:32 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 15 Oct 2019 17:09:04 +0000 (18:09 +0100)
commit2bea128c3d0b07d9b33facd24d1703438defa387
tree400a2d72e54b8aa25c635d57e3626ca494f01f20
parent1ff68783f6e94b3c1ab909f92911a04d7183241c
hw/sd/aspeed_sdhci: New device

The Aspeed SOCs have two SD/MMC controllers. Add a device that
encapsulates both of these controllers and models the Aspeed-specific
registers and behavior.

Tested by reading from mmcblk0 in Linux:
qemu-system-arm -machine romulus-bmc -nographic \
 -drive file=flash-romulus,format=raw,if=mtd \
 -device sd-card,drive=sd0 -drive file=_tmp/kernel,format=raw,if=sd,id=sd0

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190925143248.10000-3-clg@kaod.org
[clg: - changed the controller MMIO window size to 0x1000
      - moved the MMIO mapping of the SDHCI slots at the SoC level
      - merged code to add SD drives on the SD buses at the machine level ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/aspeed.c
hw/arm/aspeed_soc.c
hw/sd/Makefile.objs
hw/sd/aspeed_sdhci.c [new file with mode: 0644]
include/hw/arm/aspeed_soc.h
include/hw/sd/aspeed_sdhci.h [new file with mode: 0644]