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(parent: 676f4c0) | patch
char/cadence_uart: Define Missing SR/ISR fields
authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Mon, 6 Jan 2014 10:16:39 +0000 (10:16 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 8 Jan 2014 19:07:21 +0000 (19:07 +0000)
commit11a239a51ccbf27a22e2aa5f423ff1d6f5df65a7
tree0a6aa44475858b141a783d52f887db6332f358cctree
parent676f4c095d53841626b1ee2cbc7a53b4f6239e4ecommit | diff
char/cadence_uart: Define Missing SR/ISR fields

Some (interrupt) status register bits relating to the TxFIFO path were
not defined. Define them. This prepares support for proper Tx data path
flow control.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 2068b963f0af8cc834c353944e9fa816d950b163.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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