]> git.proxmox.com Git - mirror_qemu.git/commit - target/hexagon/translate.c
Hexagon (target/hexagon) Analyze packet before generating TCG
authorTaylor Simpson <tsimpson@quicinc.com>
Tue, 7 Mar 2023 02:58:19 +0000 (18:58 -0800)
committerTaylor Simpson <tsimpson@quicinc.com>
Tue, 7 Mar 2023 04:47:12 +0000 (20:47 -0800)
commit10849c2623af6f1c122956aaee8329b9414e637d
treef2527866630d2021b2a14904a4016dc1166b5eaa
parentdae386b80f27115fba6fd4f4ee215de8c6820e3b
Hexagon (target/hexagon) Analyze packet before generating TCG

We create a new generator that creates an analyze_<tag> function for
each instruction.  Currently, these functions record the writes to
R, P, and C registers by calling ctx_log_reg_write[_pair] or
ctx_log_pred_write.

During gen_start_packet, we invoke the analyze_<tag> function for
each instruction in the packet, and we mark the implicit register
and predicate writes.

Doing the analysis up front has several advantages
- We remove calls to ctx_log_* from gen_tcg_funcs.py and genptr.c
- After the analysis is performed, we can initialize hex_new_value
  for each of the predicated assignments rather than during TCG
  generation for the instructions
- This is a stepping stone for future work where the analysis will
  include the set of registers that are read.  In cases where
  the packet doesn't have an overlap between the registers that are
  written and registers that are read, we can avoid the intermediate
  step of writing to hex_new_value.  Note that other checks will also
  be needed (e.g., no instructions can raise an exception).

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230307025828.1612809-6-tsimpson@quicinc.com>
target/hexagon/README
target/hexagon/gen_analyze_funcs.py [new file with mode: 0755]
target/hexagon/gen_tcg_funcs.py
target/hexagon/genptr.c
target/hexagon/idef-parser/parser-helpers.c
target/hexagon/meson.build
target/hexagon/translate.c
target/hexagon/translate.h