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(parent: 6146180) | patch
target/hppa: Fix 32-bit operand masks for 0E FCVT
authorRichard Henderson <richard.henderson@linaro.org>
Wed, 24 Jan 2018 22:24:53 +0000 (14:24 -0800)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 31 Jan 2018 13:30:50 +0000 (05:30 -0800)
commitfe0a69cca56e115f7dc2800a91ef0c8be69828b6
treef71ec57079dd37efbad79317681d868c95b874c9tree
parent61461802bb535f7a004d85c181bf2061121924bfcommit | diff
target/hppa: Fix 32-bit operand masks for 0E FCVT

We masked the wrong bits, which prevented some of the
32-bit R registers.  E.g. "fcnvxf,sgl,sgl fr22R,fr6R".

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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