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(parent: 11a7511) | patch
target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>
Thu, 10 Dec 2020 19:44:23 +0000 (20:44 +0100)
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>
Thu, 14 Jan 2021 16:13:53 +0000 (17:13 +0100)
commit3a4ef3b7ee35613f5318f27321c8255606e4623f
treef4bb8dd5c0d48b358eccf9c879b42bb59cd18c85tree
parent11a7511856a059796812f7c25ceca6b35cae4b3ecommit | diff
target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction

gen_reserved_instruction() is easier to read than
generate_exception_end(ctx, EXCP_RI), replace it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201214183739.500368-12-f4bug@amsat.org>
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