]> git.proxmox.com Git - mirror_qemu.git/commit - target/riscv/cpu.c
RISC-V: Adding T-Head MemPair extension
authorChristoph Müllner <christoph.muellner@vrull.eu>
Tue, 31 Jan 2023 20:20:07 +0000 (21:20 +0100)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 6 Feb 2023 22:19:23 +0000 (08:19 +1000)
commitaf99aa72ef4576693208b827c975fac57c8b6fde
tree3f6355b2e31b7e3088f8dcd9520eded65d3a3399
parentb8a5832b87fb513725cd6d960cae6476f3a515c7
RISC-V: Adding T-Head MemPair extension

This patch adds support for the T-Head MemPair instructions.
The patch uses the T-Head specific decoder and translation.

Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230131202013.2541053-9-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/insn_trans/trans_xthead.c.inc
target/riscv/translate.c
target/riscv/xthead.decode