]> git.proxmox.com Git - mirror_qemu.git/commit - target/riscv/cpu_helper.c
target/riscv: Add MXL/SXL/UXL to TB_FLAGS
authorRichard Henderson <richard.henderson@linaro.org>
Wed, 20 Oct 2021 03:16:59 +0000 (20:16 -0700)
committerAlistair Francis <alistair@alistair23.me>
Thu, 21 Oct 2021 21:47:51 +0000 (07:47 +1000)
commit92371bd9033e5a50a7541d96ff8ad067930a4f93
treeb1410478fece6225eb4024182b5b0c1bbd2eeef0
parentdb23e5d981ab22da0bfe1150f4828d08484b1fba
target/riscv: Add MXL/SXL/UXL to TB_FLAGS

Begin adding support for switching XLEN at runtime.  Extract the
effective XLEN from MISA and MSTATUS and store for use during translation.

Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20211020031709.359469-6-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/translate.c