]> git.proxmox.com Git - mirror_qemu.git/commit - target/riscv/insn32.decode
target/riscv: rvv-1.0: integer extension instructions
authorFrank Chang <frank.chang@sifive.com>
Fri, 10 Dec 2021 07:56:26 +0000 (15:56 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 20 Dec 2021 04:51:36 +0000 (14:51 +1000)
commitcd01340e75a700591de5715aa9f0aa226e5a0d34
treeb14fc4a67aae83f443ca2b5e2761719d319f54b6
parent6b85975e11952447c3a301f33d2736c7890003dd
target/riscv: rvv-1.0: integer extension instructions

Add the following instructions:

* vzext.vf2
* vzext.vf4
* vzext.vf8
* vsext.vf2
* vsext.vf4
* vsext.vf8

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211210075704.23951-41-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/helper.h
target/riscv/insn32.decode
target/riscv/insn_trans/trans_rvv.c.inc
target/riscv/vector_helper.c