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target/sparc: Fix FMUL8x16A{U,L}
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 2 May 2024 16:55:25 +0000 (09:55 -0700)
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Sun, 5 May 2024 20:02:48 +0000 (21:02 +0100)
commita859602c746baf4892cc8ca1ce003e92411d1716
tree9128471570d1f1a49da081fc3760a002f56fe9bdtree
parent9157dccc7e71f7c94581c38f38acbef9a21bbe9acommit | diff
target/sparc: Fix FMUL8x16A{U,L}

These instructions have f32 inputs, which changes the decode
of the register numbers.  While we're fixing things, use a
common helper for both insns, extracting the 16-bit scalar
in tcg beforehand.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-5-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
target/sparc/helper.h diff | blob | blame | history
target/sparc/translate.c diff | blob | blame | history
target/sparc/vis_helper.c diff | blob | blame | history
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