]> git.proxmox.com Git - mirror_qemu.git/commit - target/tricore/translate.c
target-tricore: Add instructions of RR opcode format, that have 0x4b as the first...
authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Tue, 2 Dec 2014 17:22:27 +0000 (17:22 +0000)
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Sun, 21 Dec 2014 18:35:16 +0000 (18:35 +0000)
commite2bed107c6d1dbde564029ac2bca450cdb3f596e
treee611f5fa0a3066d177d0878b38f98fe78360ab07
parentf2f1585f60df656dc1755727cc66a0c3c8dd627d
target-tricore: Add instructions of RR opcode format, that have 0x4b as the first opcode

Add instructions of RR opcode format, that have 0x4b as the first opcode.
Add helper functions:
    * parity: Calculates the parity bits for every byte of a 32 int.
    * bmerge/bsplit: Merges two regs into one bitwise/Splits one reg into two bitwise.
    * unpack: unpack a IEEE 754 single precision floating point number as exponent and mantissa.
    * dvinit_b_13/131: (ISA v1.3/v1.31)Prepare operands for a divide operation,
                       where the quotient result is guaranteed to fit into 8 bit.
    * dvinit_h_13/131: (ISA v1.3/v1.31)Prepare operands for a divide operation,
                       where the quotient result is guaranteed to fit into 16 bit.
OPCM_32_RR_FLOAT -> OPCM_32_RR_DIVIDE.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
target-tricore/helper.h
target-tricore/op_helper.c
target-tricore/translate.c
target-tricore/tricore-opcodes.h