]> git.proxmox.com Git - mirror_qemu.git/commit - target-arm/translate.h
target-arm: A64: add support for B and BL insns
authorAlexander Graf <agraf@suse.de>
Tue, 17 Dec 2013 19:42:32 +0000 (19:42 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 17 Dec 2013 19:42:32 +0000 (19:42 +0000)
commit11e169de9940b9dc057e534ecf864c542fafb425
treea68671f0f2fcd2f24e7f10077144522860d02be3
parent87462e0f41fccc353f9c902caed563ab7cbdd8ed
target-arm: A64: add support for B and BL insns

Implement the B and BL instructions (PC relative branches and calls).

For convenience in managing TCG temporaries which might be generated
if a source register is the zero-register XZR, we provide a simple
mechanism for creating a new temp which is automatically freed at the
end of decode of the instruction.

Signed-off-by: Alexander Graf <agraf@suse.de>
[claudio: renamed functions, adapted to new decoder layout]
Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm/translate-a64.c
target-arm/translate.h