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author	ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
	Wed, 9 Jul 2008 11:05:10 +0000 (11:05 +0000)
committer	ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
	Wed, 9 Jul 2008 11:05:10 +0000 (11:05 +0000)
commit	b6d96beda3a6cbf20a2d04a609eff78adebd8859
tree	b64acdf5f52beda5f8ce56127e5cc9e34140192e	tree
parent	bd5921b43222acc511aada131882f284333ef16b	commit \| diff

Use temporary registers for the MIPS FPU emulation.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/cpu.h		diff \| blob \| blame \| history
target-mips/exec.h		diff \| blob \| blame \| history
target-mips/helper.h		diff \| blob \| blame \| history
target-mips/op_helper.c		diff \| blob \| blame \| history
target-mips/translate.c		diff \| blob \| blame \| history

Qemu copy for testing