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(parent: bdcf9d6) | patch
Set an invalid-bits mask for each SPE instructions
authorFabien Chouteau <chouteau@adacore.com>
Wed, 28 Sep 2011 05:54:05 +0000 (05:54 +0000)
committerAlexander Graf <agraf@suse.de>
Sun, 30 Oct 2011 16:11:53 +0000 (17:11 +0100)
commit70560da79d5be611bd7867f9c590847702c61fb5
tree123a12ea9536942c0954bf172f258e58c6778a1btree
parentbdcf9d6cd4ff987e58ba4f311ba7b1a33cf3ce5ecommit | diff
Set an invalid-bits mask for each SPE instructions

SPE instructions are defined by pairs. Currently, the invalid-bits mask is set
for the first instruction, but the second one can have a different mask.

example:
GEN_SPE(efdcmpeq,    efdcfs,      0x17, 0x0B, 0x00600000, 0x00180000, PPC_SPE_DOUBLE),

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Qemu copy for testing