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drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2)
authorTom St Denis <tom.stdenis@amd.com>
Tue, 9 Jun 2020 11:49:59 +0000 (07:49 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:19 +0000 (01:59 -0400)
commit055e23e3d9ea1d680977f8e34f9678c17cb3cfc1
tree443321e9eda129580272bcaf3ab603f51f78793ftree
parent7504d3bbec7da70516a13e34415b92bf5203399acommit | diff
drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2)

Requested for UMR support.

(v2): Also add reg/bits for gfx9 headers

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h diff | blob | blame | history
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