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drm/amd/display: Add SE_DCN3_REG_LIST for control SDP num
authorMax.Tseng <Max.Tseng@amd.com>
Fri, 16 Apr 2021 02:04:51 +0000 (10:04 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Apr 2021 03:35:50 +0000 (23:35 -0400)
commit069a11cca5b649f6e16ea3d97408c4f289d300ed
tree6b876434b04c41082408846e1397f027f1040353tree
parent088bebc79ee8c5ee9d61fa0381af278d5ff7da45commit | diff
drm/amd/display: Add SE_DCN3_REG_LIST for control SDP num

[Why] New platform. Need to add corresponding register control

Signed-off-by: Max.Tseng <Max.Tseng@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Wayne Lin <waynelin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h diff | blob | blame | history
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