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(parent: 6165dcb) | patch
hw/riscv: sifive_u: Correct the CLINT timebase frequency
authorBin Meng <bin.meng@windriver.com>
Tue, 6 Jul 2021 10:26:16 +0000 (18:26 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 14 Jul 2021 22:56:00 +0000 (08:56 +1000)
commit074ca702e64dcea15c9c3b2c1931351cf397debe
treef5523a7dc87081014d93d44b69f23da9369bd192tree
parent6165dcb55f0ab4b2a241e49859ce6262157887e7commit | diff
hw/riscv: sifive_u: Correct the CLINT timebase frequency

At present the CLINT timebase frequency is set to 10MHz on sifive_u,
but on the real hardware the timebase frequency is 1Mhz.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210706102616.1922469-1-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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