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(parent: caae803) | patch
target-arm: Implement new HLT trap for semihosting
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 24 Oct 2016 15:26:56 +0000 (16:26 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 24 Oct 2016 15:26:56 +0000 (16:26 +0100)
commit19a6e31c9d2701ef648b70ddcfc3bf64cec8c37e
treebe8919d03be424ede566db09efe884a98fa13c30tree
parentcaae8032d3bd0a54f09abdae7624f52dece5ffd6commit | diff
target-arm: Implement new HLT trap for semihosting

Version 2.0 of the semihosting specification introduces new trap
instructions for AArch32: HLT 0xF000 for A32 and HLT 0x3C for T32.
Implement these (in the same way we implement the existing HLT
semihosting trap for A64).

The old traps via SVC and BKPT are unaffected.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1476792973-18508-1-git-send-email-peter.maydell@linaro.org
linux-user/main.c diff | blob | blame | history
target-arm/cpu.h diff | blob | blame | history
target-arm/helper.c diff | blob | blame | history
target-arm/translate.c diff | blob | blame | history
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