]> git.proxmox.com Git - qemu.git/commit
target-arm: Fix 11MPCore cache type register value
authorPeter Maydell <peter.maydell@linaro.org>
Wed, 20 Jun 2012 11:57:06 +0000 (11:57 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 20 Jun 2012 12:00:58 +0000 (12:00 +0000)
commit200bf596b96820186883953de9bda26cac8e6bd7
tree0e986dae7195c711f1a327ed4f3e2f72d1621834
parent93bfef4c6e4b23caea9d51e1099d06433d8835a4
target-arm: Fix 11MPCore cache type register value

Make the 11MPCore report a valid value in its cache type register
(the previous value appears to have been incorrectly copied from
the 1136/1176). In particular, do not report that we have an
aliasing VIPT cache, because this causes Linux to attempt to use
the v6 block cache ops which the 11MPCore doesn't actually have.
(This causes no problems currently because we over-broadly provide
those ops on all cores, but prevents us correctly narrowing the
block ops down to those cores which actually implement them.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/cpu.c