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(parent: 1ead962) | patch
hw/timer/imx_epit: update interrupt state on CR write access
authorAxel Heider <axel.heider@hensoldt.net>
Tue, 25 Oct 2022 18:32:30 +0000 (20:32 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 5 Jan 2023 12:14:43 +0000 (12:14 +0000)
commit2ca267fd36a275c771528bd5ae50ae8406155ad9
tree8dcbbe806fb97a5657f94767414ddc0396196d3atree
parent1ead962edf1297e223a039167429d4c986bfb90ecommit | diff
hw/timer/imx_epit: update interrupt state on CR write access

The interrupt state can change due to:
- reset clears both SR.OCIF and CR.OCIE
- write to CR.EN or CR.OCIE

Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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