]> git.proxmox.com Git - mirror_qemu.git/commit
target/arm: Handle IS/FS in ISR_EL1 for NMI, VINMI and VFNMI
authorJinjie Ruan <ruanjinjie@huawei.com>
Fri, 19 Apr 2024 13:32:59 +0000 (14:32 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 25 Apr 2024 09:21:05 +0000 (10:21 +0100)
commit2e0be5f6b122e3dca53b926514287ffcead2689c
tree14ec2a9a8f167556eaec5b5eff5f0a86405c8636
parent963e4e3648e0601a8f0b288edaf524b3c98fffbd
target/arm: Handle IS/FS in ISR_EL1 for NMI, VINMI and VFNMI

Add IS and FS bit in ISR_EL1 and handle the read. With CPU_INTERRUPT_NMI or
CPU_INTERRUPT_VINMI, both CPSR_I and ISR_IS must be set. With
CPU_INTERRUPT_VFNMI, both CPSR_F and ISR_FS must be set.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240407081733.3231820-9-ruanjinjie@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h
target/arm/helper.c