]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commit
soc: imx: gpcv2: correct PGC offset
authorAnson Huang <Anson.Huang@nxp.com>
Wed, 30 May 2018 01:30:42 +0000 (09:30 +0800)
committerShawn Guo <shawnguo@kernel.org>
Sun, 17 Jun 2018 07:37:27 +0000 (15:37 +0800)
commit3637f12faf507b0a4b8ac1e7115fc99583ab1db3
treed1e2f0abe26aa21d289027782524a8e7cf9c4b63
parentdf07101e1c4a29e820df02f9989a066988b160e6
soc: imx: gpcv2: correct PGC offset

Correct MIPI/PCIe/USB_HSIC's PGC offset based on
design RTL, the values in the Reference Manual
(Rev. 1, 01/2018 and the older ones) are incorrect.

The correct offset values should be as below:

0x800 ~ 0x83F: PGC for core0 of A7 platform;
0x840 ~ 0x87F: PGC for core1 of A7 platform;
0x880 ~ 0x8BF: PGC for SCU of A7 platform;
0xA00 ~ 0xA3F: PGC for fastmix/megamix;
0xC00 ~ 0xC3F: PGC for MIPI PHY;
0xC40 ~ 0xC7F: PGC for PCIe_PHY;
0xC80 ~ 0xCBF: PGC for USB OTG1 PHY;
0xCC0 ~ 0xCFF: PGC for USB OTG2 PHY;
0xD00 ~ 0xD3F: PGC for USB HSIC PHY;

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver")
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/soc/imx/gpcv2.c