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drm/i915/tgl: Add extra hdc flush workaround
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Tue, 15 Oct 2019 15:44:42 +0000 (18:44 +0300)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 15 Oct 2019 17:16:51 +0000 (18:16 +0100)
commit36a6b5d964d995b536b1925ec42052ee40ba92c4
treeaeb0e56ae01fea0b2a47fcb2b0d6bc07e2d7bfb7tree
parent4aa0b5d457f5d29522b5db4aeb4587fc4dc24054commit | diff
drm/i915/tgl: Add extra hdc flush workaround

In order to ensure constant caches are invalidated
properly with a0, we need extra hdc flush after invalidation.

v2: use IS_TGL_REVID (Chris)

References: HSDES#1604544889
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191015154449.10338-4-mika.kuoppala@linux.intel.com
drivers/gpu/drm/i915/gt/intel_lrc.c diff | blob | blame | history
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