]> git.proxmox.com Git - mirror_qemu.git/commit
hw/intc/arm_gicv3: Use correct number of priority bits for the CPU
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 12 May 2022 15:14:56 +0000 (16:14 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 19 May 2022 15:19:02 +0000 (16:19 +0100)
commit39f29e599355f9512482b67624e7a6c9000c5ddd
treedd77f822d119d5803f253339394048c47f0a4d46
parent84597ff39484ec171567c7c80061100eb4a6c331
hw/intc/arm_gicv3: Use correct number of priority bits for the CPU

Make the GICv3 set its number of bits of physical priority from the
implementation-specific value provided in the CPU state struct, in
the same way we already do for virtual priority bits.  Because this
would be a migration compatibility break, we provide a property
force-8-bit-prio which is enabled for 7.0 and earlier versioned board
models to retain the legacy "always use 8 bits" behaviour.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220512151457.3899052-6-peter.maydell@linaro.org
Message-id: 20220506162129.2896966-5-peter.maydell@linaro.org
hw/core/machine.c
hw/intc/arm_gicv3_common.c
hw/intc/arm_gicv3_cpuif.c
include/hw/intc/arm_gicv3_common.h
target/arm/cpu.h
target/arm/cpu64.c