]> git.proxmox.com Git - mirror_qemu.git/commit
tests/tcg/aarch64/sysregs.c: Use S syntax for id_aa64zfr0_el1 and id_aa64smfr0_el1
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 6 Jul 2023 11:38:19 +0000 (12:38 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 6 Jul 2023 11:38:19 +0000 (12:38 +0100)
commit3dc2afeab2964b54848715b913b6c605f36be3e1
treeb24c1949547f873ba4a436d3cfe479908e37f59b
parent62c2b8760b8ec9316ea4f5f4c2ce2fdaed1359ee
tests/tcg/aarch64/sysregs.c: Use S syntax for id_aa64zfr0_el1 and id_aa64smfr0_el1

Some assemblers will complain about attempts to access
id_aa64zfr0_el1 and id_aa64smfr0_el1 by name if the test
binary isn't built for the right processor type:

 /tmp/ccASXpLo.s:782: Error: selected processor does not support system register name 'id_aa64zfr0_el1'
 /tmp/ccASXpLo.s:829: Error: selected processor does not support system register name 'id_aa64smfr0_el1'

However, these registers are in the ID space and are guaranteed to
read-as-zero on older CPUs, so the access is both safe and sensible.
Switch to using the S syntax, as we already do for ID_AA64ISAR2_EL1
and ID_AA64MMFR2_EL1.  This allows us to drop the HAS_ARMV9_SME check
and the makefile machinery to adjust the CFLAGS for this test, so we
don't rely on having a sufficiently new compiler to be able to check
these registers.

This means we're actually testing the SME ID register: no released
GCC yet recognizes -march=armv9-a+sme, so that was always skipped.
It also avoids a future problem if we try to switch the "do we have
SME support in the toolchain" check from "in the compiler" to "in the
assembler" (at which point we would otherwise run into the above
errors).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
tests/tcg/aarch64/Makefile.target
tests/tcg/aarch64/sysregs.c