]> git.proxmox.com Git - mirror_qemu.git/commit
target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv
authorSuraj Jitindar Singh <sjitindarsingh@gmail.com>
Fri, 10 Feb 2017 05:25:54 +0000 (16:25 +1100)
committerDavid Gibson <david@gibson.dropbear.id.au>
Wed, 22 Feb 2017 00:28:28 +0000 (11:28 +1100)
commit506590836144af7d0de3fc4c691bb5ed49d41645
tree6a20a486f32dccc9a868447ddbfac291585f8399
parent18aa49ecf40b002dcaad9ea5491923358f512e72
target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv

The vpm0 bit was removed from the LPCR in POWER9, this bit controlled
whether ISI and DSI interrupts were directed to the hypervisor or the
partition. These interrupts now go to the hypervisor irrespective, thus
it is no longer necessary to check the vmp0 bit in the LPCR.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
target/ppc/mmu-hash64.c