]> git.proxmox.com Git - mirror_qemu.git/commit
hw/gpio: Add GPIO model for Nuvoton NPCM7xx
authorHavard Skinnemoen <hskinnemoen@google.com>
Fri, 23 Oct 2020 21:06:37 +0000 (14:06 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 27 Oct 2020 11:10:32 +0000 (11:10 +0000)
commit526dbbe087475599589ada4df70a337c09ae0f3f
treee952fde2b6f45bb9bdb891998a9fa71c16b0bb67
parente23e7b12594ec0804c2d9f509f71841c82a62d1c
hw/gpio: Add GPIO model for Nuvoton NPCM7xx

The NPCM7xx chips have multiple GPIO controllers that are mostly
identical except for some minor differences like the reset values of
some registers. Each controller controls up to 32 pins.

Each individual pin is modeled as a pair of unnamed GPIOs -- one for
emitting the actual pin state, and one for driving the pin externally.
Like the nRF51 GPIO controller, a gpio level may be negative, which
means the pin is not driven, or floating.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
docs/system/arm/nuvoton.rst
hw/arm/npcm7xx.c
hw/gpio/meson.build
hw/gpio/npcm7xx_gpio.c [new file with mode: 0644]
hw/gpio/trace-events
include/hw/arm/npcm7xx.h
include/hw/gpio/npcm7xx_gpio.h [new file with mode: 0644]
tests/qtest/meson.build
tests/qtest/npcm7xx_gpio-test.c [new file with mode: 0644]