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drm/i915/skl: Updated the gen6_set_rps function
authorAkash Goel <akash.goel@intel.com>
Fri, 6 Mar 2015 05:37:17 +0000 (11:07 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Mar 2015 21:30:23 +0000 (22:30 +0100)
commit5704195c3f3c04a00c16334a033b180f16db1f94
tree2deaa791e740bebe767fe0c1d75081cf9956e8d9tree
parentcee991cb9323995b5c1e5f39540b6055ca5e73e4commit | diff
drm/i915/skl: Updated the gen6_set_rps function

On SKL, the frequency is programmed differently in RPNSWREQ (A008)
register (from bits 23 to 31, compared to bits 24 to 31). So updated
the gen6_set_rps function, as per this change.

Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c diff | blob | blame | history
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