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(parent: 944bb33) | patch
target/xtensa: add parity/ECC option SRs
authorMax Filippov <jcmvbkbc@gmail.com>
Wed, 13 Mar 2019 19:41:13 +0000 (12:41 -0700)
committerMax Filippov <jcmvbkbc@gmail.com>
Fri, 10 May 2019 23:53:55 +0000 (16:53 -0700)
commit631a77a03bc8905790af6fe3fd44c6c7ff285c73
treef8a7eb14d17ce686f1a9ff7b863f7f745f7d4410tree
parent944bb3320aeea6285d495b645f4700c3a20668e8commit | diff
target/xtensa: add parity/ECC option SRs

Add SRs and rsr/wsr/xsr opcodes defined by the parity/ECC xtensa option.
The implementation is trivial since we don't emulate parity/ECC yet.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target/xtensa/cpu.h diff | blob | blame | history
target/xtensa/overlay_tool.h diff | blob | blame | history
target/xtensa/translate.c diff | blob | blame | history
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