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(parent: 0d6b9cc) | patch
pcnet: Clear ERR in CSR0 on stop
authorJan Kiszka <jan.kiszka@siemens.com>
Wed, 29 Feb 2012 14:33:48 +0000 (15:33 +0100)
committerJan Kiszka <jan.kiszka@siemens.com>
Mon, 16 Apr 2012 13:41:24 +0000 (15:41 +0200)
commit6655124ddd6442b19a4b43b27e7d5a3846c4e6a8
treeb70db5cf5ceac5f8f300f580b999d94e6f885f78tree
parent0d6b9cc7420dd2d531b48508f0d4083d1c6a632acommit | diff
pcnet: Clear ERR in CSR0 on stop

pcnet_stop already clears any reason (BABL, CERR, MISS, MERR) why ERR
(bit 15) should be set in CRS0. So we have to clear that bit as well.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
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