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(parent: 5b75d0f) | patch
ath9k_hw: fix fast clock handling for 5GHz channels
authorFelix Fietkau <nbd@openwrt.org>
Mon, 26 Apr 2010 19:04:35 +0000 (15:04 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 27 Apr 2010 20:09:18 +0000 (16:09 -0400)
commit6b42e8d03bef975085c0397806d00fbd1df67eb8
tree42ddfa6f922ad677ee55355822c555de2a11cb10tree
parent5b75d0fca5b8cd2657fb240f2112e272a115b2f9commit | diff
ath9k_hw: fix fast clock handling for 5GHz channels

Combine multiple checks that were supposed to check for the same
conditions, but didn't. Always enable fast PLL clock on AR9280 2.0

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar5008_phy.c diff | blob | blame | history
drivers/net/wireless/ath/ath9k/ar9002_phy.c diff | blob | blame | history
drivers/net/wireless/ath/ath9k/ar9003_phy.c diff | blob | blame | history
drivers/net/wireless/ath/ath9k/hw.c diff | blob | blame | history
drivers/net/wireless/ath/ath9k/hw.h diff | blob | blame | history
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