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drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling
authorImre Deak <imre.deak@intel.com>
Thu, 29 Jun 2017 15:36:58 +0000 (18:36 +0300)
committerImre Deak <imre.deak@intel.com>
Thu, 6 Jul 2017 13:28:41 +0000 (16:28 +0300)
commit846c6b26d38e56e5004f1d71d4c13226d2514750
tree83b820f8cd6e036b5cd70a4ec4a41b7d9216a270tree
parentcb0aeaa81842948e32f39838f0ec113e3bb52291commit | diff
drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling

Bspec requires a 10 us delay after disabling power well 1 and - if not
toggled on-demand - the AUX IO power wells during display uninit.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498750622-14023-2-git-send-email-imre.deak@intel.com
drivers/gpu/drm/i915/intel_runtime_pm.c diff | blob | blame | history
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