]> git.proxmox.com Git - mirror_qemu.git/commit
RISC-V: Add initial support for T-Head C906
authorChristoph Müllner <christoph.muellner@vrull.eu>
Tue, 31 Jan 2023 20:20:11 +0000 (21:20 +0100)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 6 Feb 2023 22:19:23 +0000 (08:19 +1000)
commit95bd8daaafdff905ee4fa0620c097ad4eb2e8a13
tree97269019e4e6cb76250c828edadbc70c7f75076e
parent7ad2878cfd8356e1b9c1097edae367507c182066
RISC-V: Add initial support for T-Head C906

This patch adds the T-Head C906 to the list of known CPUs.
Selecting this CPUs will automatically enable the available
ISA extensions of the CPUs (incl. vendor extensions).

Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230131202013.2541053-13-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/cpu_vendorid.h [new file with mode: 0644]